Dual Synchronous Rectifier Controller

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Block Diagram

Dual Synchronous Rectifier Controller

TEA2096 Block Diagram


Efficiency Features

  • Adaptive gate drive for maximum efficiency at any load
  • Supply current in energy save operation of 80 μA
  • Regulation level of −29 mV for driving low-ohmic MOSFETs

Application Features

  • Drain sense voltage to 200 V
  • Wide supply voltage range from 4.5 V to 38 V
  • Dual synchronous rectification for LLC resonant
  • Supports 5 V operation with logic level SR MOSFETs
  • Differential inputs for sensing the drain and source voltages of each SR MOSFET
  • SO8 package

Control Features

  • SR control without minimum on-time
  • Adaptive gate drive for fast turn-off at the end of conduction
  • Undervoltage lockout (UVLO) protection with active gate pull-down
  • Interlock function to prevent simultaneous conduction of the external MOSFETs
  • Supports 1 MHz switching frequency

NXP GreenChip

  • This product is part of the NXP GreenChip portfolio, this program optimizes for energy efficiency in mobile and computing applications, specializing in high-power density, safety and reliability.

Part numbers include: TEA2096T.


Quick reference to our documentation types.

1 documents

Design Resources


1 software file

Note: For better experience, software downloads are recommended on desktop.


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