ColdFire® V2 Integrated Microprocessor

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  • This page contains information on a product that is not recommended for new designs.

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Block Diagram

ColdFire MCF527X Microprocessor Block Diagram

ColdFire MCF527X Microprocessor Block Diagram


  • ColdFire® V2 core with performance up to 159 (Dhrystone 2.1) MIPS @ 166 MHz
  • Enhanced multiplier-accumulator (eMAC) (32 x 32) module, hardware divide
  • 8 KB and 16 KB configurable I-/D-cache
  • 64 KB static random access memory (SRAM)
  • 4-channel DMA and external DMA req/ack
  • DDR synchronous dynamic random access memory (SDRAM) controller
  • JTAG
  • Integrated peripherals
    • Queued serial peripheral interface (QSPI)
    • Up to four pulse width modulators (PWMs)
    • Up to three universal asynchronous receiver/transmitters (UARTs)
    • Up to two 10/100 fast Ethernet controllers
    • Four 32-bit timers
    • Up to 32 general-purpose input/outputs (GPIOs)
    • Optional I²C
    • Optional USB 2.0 full-speed device
    • Optional four programmable interrupt timers (PITs)
    • Optional hardware encryption—RNG, DES, 3DES, AES, BCE, MD5, SHA-1, HMAC, hash Accelerator


Quick reference to our documentation types.

1-5 of 54 documents

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Design Files

2 design files

  • Models

    MCF5274L 196 MAPBGA BSDL Files

  • Models

    MCF5275L Integrated ColdFire® V2 Microprocessor BSDL Files


3 hardware offerings


1-5 of 13 software files

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Note: For better experience, software downloads are recommended on desktop.


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