Integrated ColdFire® V3 Microprocessor

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Block Diagram

ColdFire MCF530X Microprocessor Block Diagram

ColdFire MCF530X Microprocessor Block Diagram


  • ColdFire® V3 core delivering up to 75 (Dhrystone 2.1) MIPS @ 90 MHz
  • 4 KB SRAM
  • 8 KB unified cache
  • Integer/fractional MAC unit
  • Divide unit
  • System debug interface
  • DRAM controller
  • Dual 16-bit general-purpose multimode timers
  • System debug support
  • Package 208-pin plastic QFP
  • Integrated peripherals
    • Four-channel DMA controller
    • Two universal asynchronous receiver/transmitters (UARTS)
    • I²C-compatible bus
    • System interface module
    • 16-bit general-purpose parallel I/O port


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Design Files

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  • Models

    Core Model For MicroAPL Limited's Emulation Library


4 hardware offerings


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Note: For better experience, software downloads are recommended on desktop.


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