Ultra-Reliable MPC5777M MCU for Automotive and Industrial Engine Management


Block Diagram

MPC5777M 32-bit Multicore MCU for Powertrain Block diagram.

MPC5777M 32-bit Multicore MCU for Powertrain Block diagram.


Main Features

  • Two independent e200z7 cores operating up to 300 MHz
  • Single 300 MHz e200z7 core for delayed lockstep
  • Single e200z4 I/O core operating up to 200 MHz
  • On-chip DSP and floating point unit (on I/O core)
  • Built to support functional safety (ISO 26262 /ASIL-D)
  • 248-channel general timer module (GTM104)
  • Up to 128-channel eDMA
  • Up to 84-channel analog-to-digital converters (ADC)
  • Includes 10 x ΣΔ ADC converters
  • High-speed Nexus Aurora debug and trace support
  • 416-pin PBGA package
  • 512-pin PBGA package

Memory Capability

  • 8 MB flash memory with error code correction (ECC)
  • Up to 596 KB of total SRAM with ECC

Communication Protocols

  • Ethernet controller (FEC)
  • 4 x M-CAN and 1 x TT-CAN
  • 6 x LINFlex
  • 8 x dSPI and 2 x IIC
  • 5 x PSI-5 and 15 x SENT
  • Zipwire® support
  • 2 x dual-channel FlexRay controller

Additional Features

  • Hardware Security Module (HSM)
  • Tamper Detection Module (TDM)

Part numbers include: PPC5777M2K0MVA8B, PPC5777M2K0MVU8B, SPC5777MK0MVA8, SPC5777MK0MVU8.


Quick reference to our documentation types.

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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

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To find a complete list of our partners that support this product, please see our Partner Marketplace.


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