Power Management for i.MX50/53 Processors

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Product Details

Block Diagram

MC34709_BD

NXP<sup>&#174;</sup> MC34709 PMIC Internal Block Diagram

Features

Power Supplies

  • Six multi-mode buck regulators
    • Two single/dual-phase buck regulators
    • Three single-phase buck regulators
    • Up to six independent outputs
    • PFM/PWM operation mode
    • Dynamic voltage scaling
  • 5 V boost regulator
    • Support for USB physical layer on i.MX processor (USB PHY)
  • Eight LDO regulators
    • Two with selectable internal or external pass devices
    • Four with embedded pass devices
    • One with an external PNP device
    • Voltage reference for DDR memory with internal PMOS device
  • Hardware programmable power-up sequence

10-Bit ADC Core

  • Seven general purpose ADC channels
  • Dedicated channels for monitoring die temperature and coin cell voltage
  • Resistive touchscreen interface

Auxiliary Circuits

  • General purpose I/Os
  • PWM outputs

Clocking and Oscillators

  • Real time clock
  • Time and day counters
  • Time of day alarm
  • 32.768 kHz crystal oscillator
  • Coin cell battery backup and charger

Serial Interface

  • SPI / I2C communication protocol

Key Parametrics

  • MCU Supported
    i.MX35, i.MX37, i.MX50, i.MX51, i.MX53
  • Number of Buck Regulators
    6
  • Number of LDO
    8
  • Interface and Input Control
    I2C

Documentation

Quick reference to our documentation types.

1-5 of 8 documents

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Design Resources

Design Files

1 design file

Hardware

2 hardware offerings

  • Embedded Board Solutions

    Nitrogen8M_Mini

  • Embedded Board Solutions

    Nitrogen8M_Mini SOM

Engineering Services

2 engineering services

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