Kinetis® KL0x-48 MHz, Entry-Level Ultra-Low Power Microcontrollers (MCUs) based on Arm® Cortex®-M0+ Core

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Block Diagram

Kinetis L Series KL0x MCUs Block Diagram

Kinetis L Series KL0x MCUs Block Diagram

Features

Ultra-Low-Power

  • Next-generation 32-bit Cortex-M0+ core: 2x more CoreMark/mA than the closest 8/16-bit architecture
  • Single-cycle fast I/O access port facilitates bit banging and software protocol emulation, keeping an 8-bit look and feel
  • Multiple flexible low-power modes, including new compute clocking option which reduces dynamic power by placing peripherals in an asynchronous stop mode
  • LPUART, SPI, I2C, ADC, DAC, LP timer and DMA support low-power mode operation without waking up the core

Memory

  • Up to 32 KB flash with 64-byte flash cache, up to 4 KB RAM
  • Security circuitry to prevent unauthorized access to RAM and flash contents
  • 8 KB ROM and built-in bootloader simplifies the effort to program MCU and allows for easy flash upgrades

Performance

  • Cortex-M0+ core, 48 MHz core frequency over full voltage and temperature range (-40C to +105C)
  • Bit manipulation engine for improved bit handling of peripheral modules
  • Thumb instruction set combines high code density with 32-bit performance
  • Up to 4-ch. DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
  • Independent-clocked COP guards against clock skew or code runaway for fail-safe applications

Mixed-Signal

  • 12-bit ADC with configurable resolution, sample time and conversion speed/power
  • Integrated temperature sensor
  • High-speed comparator with internal 6-bit DAC
  • 12-bit DAC with DMA support

Timing and Control

  • One 6-ch. and one 2-ch. 16-bit low-power timer PWM modules with DMA support
  • 2-ch., 32-bit periodic interrupt timer provides time base for RTOS task schedule or trigger source for ADC conversion
  • Low-power timer allows operation in all power modes except for VLLS0
  • Real-time clock with calendar

Human-Machine Interface

  • Capacitive touch sense interface supports up to 16 external electrodes and DMA data transfer
  • GPIO with pin interrupt support, DMA request capability and other pin control options

Connectivity and Communications

  • I2C with DMA support, up to 100 kbps and compatible with SMBus V2 features
  • LPUART and SPI with DMA support

MCUXpresso Software and Tools

Design Resources

Documentation

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Software

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Training

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