Documentation
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Data Sheet
Dual bidirectional bus buffer
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Application Note
Very large I2C-bus systems and long buses
Dual Bidirectional Bus Buffer
PCA9601 Receive alerts
The PCA9601 is designed to isolate I²C-bus capacitance, allowing long buses to be driven in point-to-point or multipoint applications of up to 4000 pF. The PCA9601 is a higher-speed version of the P82B96 and a higher drive version of the PCA9600 that allows many more Fast-mode Plus (Fm+) targets on remote daughter cards in applications with temperature range of 0 °C to 85 °C.
It creates a non-latching, bidirectional, logic interface between a normal I²C-bus and a range of other higher capacitance or different voltage bus configurations. It can operate at speeds up to at least 1 MHz, and the high drive side is compatible with the Fast-mode Plus specifications.
The PCA9601 features temperature-stabilized logic voltage levels at its SX/SY interface making it suitable for interfacing with buses that have non I²C-bus-compliant logic levels such as SMBus, PMBus, or with microprocessors that use those same TTL logic levels.
15 mA drive capability over 0 °C to 85 °C at SX/SY allows driving a 5 V Fm+ bus with 470 pF loading.
The separation of the bidirectional I²C-bus signals into unidirectional TX and RX signals enables the SDA and SCL signals to be transmitted via balanced transmission lines (twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RX signals may be connected together to provide a normal bidirectional signal.
Product Details
Features
- Bidirectional data transfer of I²C-bus signals
- 15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads
- Isolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side
- 1 MHz operation on up to 20 meters of wire (see AN10658)
- Supply voltage range of 2.5 V to 15 V with I²C-bus logic levels on SX/SY side independent of supply voltage
- Splits I²C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interface with opto-electrical isolators and similar devices that need unidirectional input and output signal paths
- Low power supply current
- ESD protection exceeds 3500 V HBM per JESD22-A114, and 1400 V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
- Packages offered: SO8 and TSSOP8 (MSOP8)
Target Applications
- Interface between I²C-buses operating at different logic levels (for example, 5 V and 3 V or 15 V)
- Interface between I²C-bus and SMBus (350 μA) standard or Fm+ standard
- Simple conversion of I²C-bus SDA or SCL signals to multi-drop differential bus hardware, for example, via compatible PCA82C250
- Interfaces with opto-couplers to provide opto-isolation between I²C-bus nodes up to 1 MHz
- Long distance point-to-point or multipoint architectures
Design Resources
Design Files
4 design files
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Models
PCA9601DP IBIS model
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Symbols and Footprints
PCA9601D-SO8-CAD Symbol and PCB Footprint – BXL File
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Symbols and Footprints
PCA9601DP-TSSOP8-CAD Symbol and PCB Footprint – BXL File
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Calculators
NXP I2C Maximum Clock Speed Calculator
Hardware
2 hardware offerings
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Evaluation and Development BoardsSurface Mount to DIP Evaluation Board
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Evaluation and Development BoardsI²C Fm+ Development Board
Engineering Services
To get further assistance directly from NXP, please see our Engineering Services.
1 engineering service
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Independent Design House (IDH)
Embedded Software Design
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