i.MX 6SLL Processors - Single-Core Processor with Arm® Cortex®-A9 Core


Product Details

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Block Diagram

i.MX 6SLL Multimedia Applications Processor Block Diagram

i.MX 6SLL Multimedia Applications Processor Block Diagram



  • 1x Arm® Cortex®-A9 up to 1 GHz (with TrustZone)
  • 32 KByte L1 Instruction Cache
  • 32 KByte L1 Data Cache
  • Private Timer and Watchdog
  • Cortex-A9 NEON MPE (Media Processing Engine) co-processor


  • 32 bit LPDDR2
  • 32 bit LPDDR3


  • 2 x USB 2.0 OTG with PHY
  • 3 x eMMC 5.0/SD 3.0
  • 3 x I2S/SSI
  • 4x SPI, 5x UART, 3x I2C
  • S/PDIF Tx/Rx


  • EPDC, color, and monochrome E-INK, up to 2332x1650 resolution and 5-bit grayscale, supporting Gen-II (REAGL/-D) Processing
  • Single Engine
  • 24-bit Parallel LCD Display 2D graphics processor PXP that can support CSC, dithering, rotation, resize, and overlay

Package and Temperature

  • 13 x 13 mm, 0.5 mm BGA
  • 14 x 14 mm, 0.65 mm BGA
  • Consumer (0° to +95°), up to 1 GHz
  • Industrial (-40° to 105°) , up to 800 MHz


Quick reference to our documentation types.

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Design Resources

Design Files

1 design file

  • Models

    i.MX 6SLL IBIS Model files


2 hardware offerings


4 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

1-5 of 45 engineering services

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To find a complete list of our partners that support this product, please see our Partner Marketplace.


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