i.MX 6UltraLite Processor - Low-Power, Secure, Arm® Cortex®-A7 Core

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Block Diagram

i.MX 6UltraLite Applications Processor Block Diagram

i.MX 6UltraLite Applications Processor Block Diagram


CPU Complex

  • Arm Cortex-A7 @ 696 MHz, 128 KB L2 cache


  • Parallel LCD Display up to WXGA (1366x768)
  • 8/10/16/24-bit Parallel Camera Sensor Interface


  • 16-bit LP-DDR2, DDR3/DDR3L
  • 8/16-bit Parallel NOR FLASH / PSRAM
  • Dual-channel Quad-SPI NOR FLASH
  • 8-bit Raw NAND FLASH with 40-bit ECC


  • 2x MMC 4.5/SD 3.0/SDIO Port
  • 2x USB 2.0 OTG, HS/FS, Device or Host with PHY
  • Audio Interfaces include 3x I2S/SAI, S/PDIF Tx/Rx
  • 2x 10/100 Ethernet with IEEE 1588
  • 2x 12-bit ADC, up to 10 input channel total, with resistive touch controller (4-wire/5-wire)

Advanced Power Management

  • Partial PMU Integration


  • Security Block: TRNG, Crypto Engine (AES with DPA, TDES/SHA/RSA), Tamper Monitor, Secure Boot, SIMV2/EVMSIM X 2, OTF DRAM
  • Encryption, PCI4.0 pre-certification


  • 14x14 289MAPBGA 0.8mm pitch
  • 9x9 272 MAPBGA 0.5mm pitch


Quick reference to our documentation types.

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Design Resources

Design Files

3 design files

  • Models

    i.MX 6UltraLite 9x9 IBIS Model File

  • Models

    i.MX 6UltraLite 14x14 IBIS Model File

  • Models

    i.MX 6UltraLite BSDL File


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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

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