S32R Radar MPU – High Performance for Imaging Radar

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Product Details

Block Diagram

S32R45 Block Diagram

S32R45 Block Diagram


High Performance Safe Compute

  • Quad Arm Cortex-A53 @800 MHz, flexible lockstep
  • Triple Arm Cortex-M7 lockstep pairs @400 MHz

Radar Processing Acceleration

  • SPT 3.1 @600 MHz with integrated DSP and multi- threading
  • Linear algebra accelerator (LAX) 1.0: > 300 GFLOPS

Integrates with NXP Radar MMIC’s

  • 4x MIPI CSI2 to enable imaging radar with NXP TEF82xx

Memory Capacity for Demanding Radar Applications

  • 8 MB SRAM with ECC
  • DDR3L-1600 with 16/32-bit support and LP-DDR4-1600/3200 with 16/32-bit support

Future Proof Security for Tomorrow Applications

  • Hardware security engine (HSE) with EdgeLock® certification

Designed with Safety in Mind

  • ISO26262 SEooC ASIL B(D)

Connected and Scalable

  • 2* Gen 2/3 PCIe to enable system expansion and data sharing
  • 2 x Gb Ethernet 10/100/1000 Mbit/s
  • 8 x FlexCAN with FD

Full Grade1 Temperature Range Operation

  • -40 ºC to 150 °C (Tj) AEC-Q100 grade-1


SafeAssure Functional Safety Program

SafeAssure Functional Safety Program

When it comes to functional safety, NXP stands for quality and reliability. Our SafeAssure program simplifies system-level safety requirements in accordance with ISO 26262.
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Design Resources


Quick reference to our documentation types.

4 documents

Design Files


1-5 of 8 hardware offerings

  • Test Accessories and Debugger

    TRACE32 Debugger with CombiProb

  • Test Accessories and Debugger

    TRACE32 Debug and Parallel NEXU

  • Test Accessories and Debugger

    TRACE32 BDM Debugger for MCS08

  • Test Accessories and Debugger

    TRACE32 JTAG Debugger for StarC

  • Test Accessories and Debugger

    Green Hills Probe

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4 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

3 engineering services

To find a complete list of our partners that support this product, please see our Partner Marketplace.


7 trainings

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