16/32-bit Arm^® microcontrollers; 256 kB ISP/IAP flash with CAN, 10-bit ADC and external memory interface

• Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device. They also allow for a port pin to be read at any time regardless of its function.
• Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are 5 V tolerant when configured for digital I/O function(s).
• UART0/1 include fractional baud rate generator, auto-bauding capabilities and handshake flow-control fully implemented in hardware.
• Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
• SPI programmable data length and leader mode enhancement.
• Diversified Code Read Protection (CRP) enables different security levels to be implemented. This feature is available in LPC2292/2294/00 devices as well.
• General purpose timers can operate as external event counters.

Key features common for all devices

• 16/32-bit Arm7TDMI-S^™ microcontroller in a LQFP144 package.
• 16 kB on-chip static RAM and 256 kB on-chip flash program memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation.
• In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader software. Single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms.
• EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software as well as high-speed real-time tracing of instruction execution.
• Two/four (LPC2292/2294) interconnected CAN interfaces with advanced acceptance filters. Additional serial interfaces include two UARTs (16C550), Fast I²C-bus (400 kbit/s) and two SPIs.
• Eight channel 10-bit ADC with conversion time as low as 2.44 µs.
• Two 32-bit timers (with four capture and four compare channels), PWM unit (six outputs), Real-Time Clock (RTC), and watchdog.
• Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.
• Configurable external memory interface with up to four banks, each up to 16 MB and 8/16/32-bit data width.
• Up to 112 general purpose I/O pins (5 V tolerant). Up to nine edge/level sensitive external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 µs.
• The on-chip crystal oscillator should have an operating range of 1 MHz to 25 MHz.
• Power saving modes include Idle and Power-down.
• Processor wake-up from Power-down mode via external interrupt.
• Individual enable/disable of peripheral functions for power optimization.
• Dual power supply:
  • CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ± 0.15 V).
  • I/O power supply range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.