i.MX 8 Family – Arm® Cortex®-A53, Cortex-A72, Virtualization, Vision, 3D Graphics, 4K Video

i.MX8

Click over video to play

  • Fast multi-OS platform deployment via advanced full-chip hardware virtualization and domain protection
  • Deploy rich, fully-independent graphics content across 4x HD screens or 1x 4K screen
  • Incorporate Vision and Speech Recognition interactivity via a powerful vision pipeline and audio processing subsystem
  • Rapidly deploy multiple products by utilizing pin and power compatible packages and software friendly copy-exact IP blocks
  • Android™, Linux®, FreeRTOS, QNX™, Green Hills®, Dornerworks XEN™
  • Automotive AEC-Q100 Grade 3 (-40° to 125° C Tj), Industrial (-40° to 105° C Tj)
  • Fully supported on NXP’s 10 and 15-year Longevity Program

i.MX 8 applications processors are part of NXP's EdgeVerse™ edge computing platform.

For additional information and sample availability, contact your local NXP® Sales Office or NXP Authorized Distributor.

Product Details

Select a section:

Block Diagram

Choose a diagram:

i.MX 8 Family Block Diagram

i.MX 8 Family Block Diagram

i.MX 8QM Software Ecosystem

i.MX 8QM Software Ecosystem
Get diagram PDF

Features

Processor Complex

  • Core Complex #1: 4x Cortex-A53
  • Core Complex #2: 2x Cortex-A72
  • 2x Cortex-M4F
  • 1x HIFI4 DSP

Multimedia

  • 16 Vec4-Shader GPU, 32 compute units OpenGL® ES 3.2 and Vulkan® support Tessellation and Geometry Shading
  • Split-GPU architecture enables 2x 8 Shader Cores
  • Vision Extensions
  • 4k h.265 Decode, 1080p h.264 encode

Connectivity

  • 2x PCIe 3.0 (2-lane or 2x 1-lane)
  • dual Gigabit Ethernet with audio video bridging (AVB)
  • 3x Flex-CAN
  • 2x 12bit ADC (8 channels each)
  • 1x USB 3.0, 2x USB 2.0 with PHY
  • 3x SD 3.0 and eMMC 5.1
  • 4x SPI, 2x ESAI, 5x SAI, 1x Keypad
  • 5x I2C (High-speed), 8x I2C (Low-speed)
  • 1x SPDIF, 2x MPEG-2 T/S
  • 1x FPGA interface (QuadSPI)

Display

  • 2x Display Processor Controllers with inline blending and WARP
  • SafeAssure Fail-over capable (per DPC)
  • 2x 4-lane MIPI DSI
  • 2x 4-lane MIPI CSI
  • 2x LVDS
  • 1x HDMI* 2.0 TX with HDCP* 2.2, 1x eDP* 1.2, 1x DP* 1.4
  • 1x HDMI 1.4 RX with HDCP 2.2

Security

  • High Assurance Boot, SHE
  • TRNG, AES-128, AES-256, 3DES, ARC4, RSA4096, SHA-1, SHA-2, SHA-256, MD-5
  • RSA-1024, 2048, 3072, 4096 and secure key storage
  • Tamper-pins (active and passive)
  • Inline Encryption Engine (AES-128)

Memory

  • 1x OctoSPI or 2x QuadSPI
  • SATA 3.0 (or 1x PCIe 3.0 1-lane)

Temperature

  • Automotive AEC-Q100 Grade 3 (-40° to 125° C Tj), Industrial (-40° to 105° C Tj)

Advanced Power Management

  • Recommended PMIC:PF8200: Power Management integrated circuit for i.MX 8 and i.MX 8X families

Design Resources

Select a section:

Documentation

Quick reference to our documentation types.

Filters

1-5 of 30 documents

Show All

Design Files

Filters

1-5 of 7 design files

Show All

Hardware

Filters

1-5 of 6 hardware offerings

Show All

Software

Filters

1-5 of 7 software files

Show All

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

1-5 of 52 engineering services

Show All

To find a complete list of our partners that support this product, please see our Partner Marketplace.

Training

Filters

21 trainings

Show All