Multimedia Applications Processors - LCD Controller, Arm® Cortex®-A8 Core

Block Diagram

i.MX502 Multimedia Applications Processor Block Diagram

i.MX502 Multimedia Applications Processor Block Diagram


CPU Complex

  • Up to 800 MHz Arm® Cortex™-A8
  • 32 KB instruction and data caches
  • Unified 256 KB L2 cache
  • NEON SIMD media accelerator
  • Vector floating point coprocessor


  • 32-bit primary display support up to SXGA+ resolution
  • Pixel Processing Pipeline (ePxP) supporting CSC, Combine, Rotate, Gamma Mapping

External Memory Interface

  • Up to 2GB of LP-DDR2, DDR2 and LP-DDR1(mDDR), 16/32-bit
  • SLC/MLC NAND flash, 8/16-bit with 32-bit ECC

Advanced Power Management

  • Multiple independent power domains
  • State Retention Power Gating (SRPG)
  • Dynamic voltage and frequency scaling (DVFS)


  • High-Speed USB 2.0 OTG with PHY
  • High-Speed USB 2.0 Host with PHY
  • 10/100 Ethernet controller


  • Wide array of serial interfaces, including SDIO, SPI, I2C and UART
  • I2S audio interface

Product Longevity

Part numbers include: MCIMX502CVK8B, MCIMX502CVM8B, MCIMX502EVM8B.


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5 software files

Note: For better experience, software downloads are recommended on desktop.

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