8-bit Embedded EEPROM for User Data Storage AB MCUs

HC08AB
  • Not Recommended for New Designs
  • This page contains information on a product that is not recommended for new designs.

The HC08AB Family is a member of the low-cost, high-performance M68HC08 Family of 8-bit microcontroller units (MCUs) with embedded EEPROM or Flash memory for user data storage. All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.

Product Details

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Features

High-Performance 68HC08 CPU Core

  • 8 MHz bus operation at 5V operation for 125 ns minimum instruction cycle time
  • Efficient instruction set, including multiply and divide
  • 16 flexible addressing modes, including stack relative with 16-bit stack pointer
  • Fully static, low-voltage, low-power design with wait and stop modes

Integrated Second-Generation Flash Memory

  • In-application reprogrammable
  • Fast programming, encoding 64B in as fast as 2 ms
  • Flash programming across the 68HC08’s full operating supply voltage with no extra programming voltage
  • 10K write/erase cycles minimum over temperature
  • Flexible block protection and security

Integrated EEPROM

  • Byte-erasable
  • 512 bytes of on-chip EEPROM with security feature

8-bit Analog-to-Digital Converter (ADC)

  • 8 channels
  • Single conversion in 17 µs

Clock Generation Module with Phase-Lock Loop (PLL)

  • Programmable clock frequency in integer multiples of external crystal reference
  • Crystal reference of 1 MHz to 8 MHz
  • External clock option with or without PLL

System Protection

  • Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source
  • Low-voltage detection with reset or interrupt
  • Illegal op code and illegal address detection with reset
  • Flash protection

8 Programmable 16-bit Timer Channels

  • 125 ns resolution at 8 MHz bus
  • Free-running counter or modulo up-counter
  • Periodic interrupt timer

Serial Communications Interface (SCI)

  • UART asynchronous communications system
  • Flexible baud rate generator
  • Double-buffered transmit and receive
  • Optional hardware parity checking and generation

System Protection

  • Computer Operating Properly (COP) Watchdog Timer
  • Low-Voltage Inhibit (LVI)

Up to 51 Bidirectional Input/Output (I/O) Lines

  • 10 mA sink/source capability on all I/O pins
  • 15 mA sink capability on eight I/O pins
  • Keyboard scan with selectable interrupts on five I/O pins
  • Software programmable pull-ups on I/O pins

Design Resources

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