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Join our teamQorIQ® T4240/T4160/T4080 Multicore Communications Processors
Overview
Features
Features
Core Complex
- Twelve dual-threaded e6500 cores built on Power Architecture® technology on T4240/T4241, each with one AltiVec® engine (eight and T4160/T4161 and four on T4080/T4081)
- Arranged as three clusters of four e6500s, each sharing a 2 MB L2 cache (two clusters on T4160/T4161 and one cluster on T4080/T4081).
- Up to 1.8 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
- Three levels of instruction: user, supervisor, and hypervisor
- 1.5 MB CoreNet® Platform Cache (1MB on T4160/T4161 and T4080/T4081)
Networking Elements
- SerDes: 32 lanes (T4240/T4241) or 24 lanes (T4160/T4161 and T4080/T4081) at up to 10GHz
- Supports XAUI, XFI, 10Gbase-KR, QSGMII, SGMII, 2.5G SGMII, HiGig, HiGig2, Interlaken, PCIe, SRIO, and SATA
- Ethernet
- Up to 4x 10GE ports on XAUI, XFI, 10Gbase-KR, and HiGig (2x 10GE on T4160/T4161 and T4080/T4081)
- Supports up to 16x 1GE ports with SGMII, QSGMII, and RGMII (13 on T4160/T4161 and T4080/T4081).
- Packet parsing, classification and distribution up to 50Gb/s
- Data Center Bridging
- Interlaken-LA
- 4x PCIe, two at Gen2 and two at Gen3 (3x PCIe, one at Gen2 and two at Gen3 on T4160/T4161 and T4080/T4081)
- SR-IOV with two PF and 128 VF
- 2x Serial RapidIO, 5GHz
- Serial Rapid IO Message Manager for Type 8 - 11 messages.
- 2x Serial ATA (SATA2.0) controllers
- 3x 8-channel DMA engines
- Aurora high performance debug port
Accelerators and Memory Control
- Three 64-bit DDR3 and DDR3L SDRAM memory controller with ECC support, operating up to 1866MT/s (two controllers on T4160/T4161 and T4080/T4081)
- Hardware-based Cryptography acceleration (SEC5.0) to 40Gb/s
- Data compression/decompression engine (DCE1.0) to 20Gb/s
- Pattern Matching Engine (PME2.0) to 10Gb/s
Basic Peripherals and Interconnect
- Enhanced secure digital host controller (SD/MMC/eMMC)
- Enhanced serial peripheral interface (SPI)
- 2 x USB controller (USB 2.0) with integrated PHY
- 4 x I²C controllers, 2 x DUARTs, timers
- Integrated flash controller (IFC) supporting NAND and NOR flash
Additional Features
- Trusted boot platform
- Advanced power management
QorIQ T Series T4240 64-bit Multicore Communications Processors
NXP Priority Support- helping you to get to market faster
QorIQ® T4240/T4160 Communications Processor
ISSCC Interview with IBM's Ronald Luijten
vAccess Network Development Base Station Example
T4 Family Low Power Options
-
QorIQ T Series T4240 64-bit Multicore Communications Processors -
NXP Priority Support- helping you to get to market faster -
QorIQ® T4240/T4160 Communications Processor -
ISSCC Interview with IBM's Ronald Luijten -
vAccess Network Development Base Station Example -
T4 Family Low Power Options
T4240 BD IMG
Development Boards and Designs
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Target Applications
Automotive
Communication Infrastructure
Industrial
- Air Conditioning (AC)
- Anesthesia Unit Monitor
- Avionics
- Defibrillator
- Electricity Generation
- Heat Metering
- Industrial Control
- Intermediate Flight Controller
- Powered Patient Beds
- Smart Power Socket and Light Switch
Mobile
Smart City
Smart Home
- Major Home Appliances
- Personal/Consumer NAS
- Robotic Appliance
- Small and Medium Appliances
Comparison Table
| T4080 | T4081 | T4160 | T4161 | T4240 | T4241 | |
|---|---|---|---|---|---|---|
| Power Variant | Standard | Low | Standard | Low | Standard | Low |
| Cores (Dual Threaded) | 4 | 8 | 12 | |||
| L2 Cache | 2MB | 4MB | 6MB | |||
| CoreNet Platform Cache | 1MB | 1MB | 1.5MB | |||
| DDR Controllers | 2 | 2 | 3 | |||
| SerDes Lanes | 24 | 24 | 36 | |||
| Max 10Gbps Ethernet | 2 | 2 | 4 | |||
| Max 1Gbps Ethernet | 13 | 13 | 16 | |||
| PCIe ports | 3 | 3 | 4 | |||
We recommend the following Quad Port Gigabit Copper EEE PHY
| F104S8A | F104X8A | |
|---|---|---|
| Description | QSGMII PHY Standard Temperature | QSGMII PHY Extended Temperature |
| Operating Temperature (°C) | 0 - 125 | -40 - 125 |
| Package Type | 12x12, QFN, 138-pin, 0.65mm pin pitch | 12x12, QFN, 138-pin, 0.65mm pin pitch |
| Read More | Product Detail | |
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