QorIQ® P1023

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The P1023 and P1017 processors offer the value of integrated high-performance data path offload for networking protocols and dual e500 Power Architecture^® cores for application software. The P1023 and P1017 are ideally suited for high-performance enterprise WLAN, fixed routers and security gateway applications. The P1023 device supports a 400–800 MHz performance range, along with advanced security and a rich set of interfaces—all delivered on 45 nm technology for low-power implementation.

The P1023 processor includes a performance-optimized implementation of the QorIQ^® data path acceleration architecture (DPAA). This architecture provides the infrastructure to support simplified sharing of networking interfaces and accelerators by multiple CPU cores. The DPAA significantly reduces software overhead associated with high touch packet forwarding operations. Examples of the types of packet processing services this architecture is optimized to support include traditional routing and bridging, firewall, VPN termination for IPsec and MACsec (a standardized form of Ethernet encapsulation that can be used to provide confidentiality).

Data Sheet

Reference Manual

Product Details

Block Diagram

Freescale QorIQ P1023/17 Communication Processor Block Diagram

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Features

CORE COMPLEX

Dual (P1023) or single (P1017) high-performance
Power Architecture e500v2 cores
Dual-core 500MHz or single-core up to 800MHz
32 KB instruction and data L1 caches
Double-precision floating-point support
256 KB L2 cache with ECC.
- Also configurable as SRAM and stashing memory

NETWORKING ELEMENTS

High-speed interfaces supporting various multiplexing options:
- Four SerDes up to 3.125 GHz multiplexed across controllers
- Two 10/100/1000 Mbps three-speed Ethernet controllers (TSECs)
- Three PCI Express^{^®} interfaces
- Two SGMII interfaces

ACCELERATORS AND MEMORY CONTROL

32-bit DDR3/DDR3L SDRAM memory controller
DPAA incorporating acceleration for the following functions:
- Packet parsing, classification and distribution queue management for scheduling, packet sequencing and congestion management hardware buffer management for buffer allocation and de-allocation
Integrated security engine
- Protocol support includes single pass encryption and message authentication for common security protocols (IPsec, SSL, SRTP, DTLS), XOR acceleration

BASIC PERIPHERALS AND INTERCONNECT

High-speed USB controller (USB 2.0) host and device support
ULPI interface to PHY
eLBC, Dual I²C, DUART, PIC, DMA, GPIO x16

ADDITIONAL FEATURES

Support for a hardware MACSEC enabled interface
Support for IEEE^{^®} 1588

PACKAGE

457-pin temperature-enhanced plastic BGA (TEPBGA1)
Standard and extended temp support: -40C to 105C Tj

Part numbers include: P1017NSE5CFB, P1017NSN5HFB, P1023NSE5CFB, P1023NXE5CFB.

Buy/Parametrics

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Documentation

Quick reference to our documentation types.

1-5 of 37 documents

^{Fact Sheet}
P1023 Fact SheetFeatured

PDFRev 1May 9, 2012398.8 KBQORIQP1023FSEnglish
^{Data Sheet}
P1023 QorIQ Integrated Processor Data Sheet - Data Sheet

PDFRev 1May 7, 20131.3 MBP1023English
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^{Data Sheet}
P1017 QorIQ Integrated Processor Data Sheet - Data Sheet

PDFRev 1May 7, 20131.3 MBP1017English
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^{Reference Manual}
EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual

PDFRev 1Jun 26, 201410.4 MBEREF_RMEnglish
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^{Reference Manual}
P1023 Security (SEC 4.2) Reference Manual

PDFRev 0Feb 10, 20136.2 MBP1023SECRMEnglish
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^{Reference Manual}
P1023 QorIQ Integrated Processor Reference Manual

PDFRev 0Feb 10, 201310.7 MBP1023RMEnglish
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^{Reference Manual}
QorIQ Data Path Acceleration Architecture (DPAA) Reference Manual

PDFRev 2Nov 4, 201119.4 MBDPAARMEnglish
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^{Reference Manual}
PowerPC ™ e500 Core Family - Reference Manual

PDFRev 1May 11, 20055.7 MBE500CORERMEnglish
^{Application Note}
AN5125, Introduction to Device Trees - Application Note

PDFRev 0Sep 3, 2015566.4 KBAN5125English
^{Application Note}
AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note

PDFRev 4Nov 11, 2014468.7 KBAN4039English
^{Application Note}
AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes

PDFRev 0Jan 21, 20141.2 MBAN4848English
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^{Application Note}
AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes

PDFRev 2Dec 16, 2013269.4 KBAN4531English
^{Application Note}
AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note

PDFRev 6Nov 25, 2013547.7 KBAN3940English
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^{Application Note}
Verification of the IEEE 1588 Interface

PDFRev 0Jul 6, 2011743.2 KBAN4326English
^{Application Note}
SerDes Reference Clock Interfacing and HSSI Measurements Recommendations

PDFRev Rev. 0May 13, 2011577.2 KBAN4311English
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^{Application Note}
Support for IEEE 1588™ Protocol in PowerQUICC and QorIQ Processors

PDFRev 0Oct 6, 2010142.0 KBAN3423English
^{Application Note}
DDR Interleaving for PowerQUICC and QorIQ Processors

PDFRev 1Jun 30, 2010717.3 KBAN3939English
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^{Application Note}
AN4064, Utilizing 36-Bit Physical Addressing in U-Boot and Linux - Application Notes

PDFRev 0Mar 28, 2010576.8 KBAN4064English
^{Application Note}
Understanding SYSCLK Jitter

PDFRev 1Feb 18, 2010514.4 KBAN4056English
^{Application Note}
The SystemID Format for Power Architecture™ Development Systems

PDFRev 2Oct 26, 2009495.3 KBAN3638English
^{Application Note}
MPC603e and e500 Register Model Comparison

PDFRev 1Sep 23, 2009612.9 KBAN2490English
^{Application Note}
Implementing SGMII Interfaces on the PowerQUICC™ III

PDFRev 0Jun 5, 2009692.4 KBAN3869English
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^{Application Note}
AN3542, SMP Boot Process for Dual E500 Cores - Application Notes

PDFRev 0Jan 25, 2008519.9 KBAN3542English
^{Application Note}
PowerQUICC™ Data Cache Coherency

PDFRev 0Dec 21, 2007547.7 KBAN3544English
^{Application Note}
Coherency and Synchronization Requirements for PowerQUICC™ III

PDFRev 1Dec 17, 2007189.0 KBAN3441English
^{Application Note}
Error Correction and Error Handling on PowerQUICC (TM) III Processors

PDFRev 0Nov 27, 2007573.0 KBAN3532English
^{Application Note}
AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes

PDFRev 0Oct 31, 2007935.0 KBAN3445English
^{Application Note}
AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes

PDFRev 0Oct 31, 2007961.6 KBAN3531English
^{Application Note}
Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces

PDFRev 2Mar 27, 2007619.7 KBAN2910English
^{Application Note}
AN2665, e500 Software Optimization Guide (eSOG) - Application Notes

PDFRev 0Apr 8, 2005799.6 KBAN2665English
^{Application Note Software}
Challenges in Testing for Power Rail Shorts with New Technologies

PDFRev 0Jun 13, 2007163.7 KBAN3372English
^{Engineering Bulletin}
COM Express Pin Assignments for QorIQ Devices

PDFRev 0Mar 3, 2011492.6 KBEB739English
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^{Supporting Information}
FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP^® Cryptographic Accelerators - White Paper

PDFRev 1.9Oct 28, 2016303.5 KBFSLNISTCAVPEnglish
^{Supporting Information}
P1023_P1017 Family Customer Export Control Information

PDFRev 1Dec 10, 2010247.5 KBP1023_P1017PECIEnglish
^{Supporting Information}
P1020 and P1021 Family Customer Export Control Information

PDFRev 2Dec 10, 2010246.8 KBP102XFAMPECIEnglish
^{White Paper}
QORIQPMWP, QorIQ Power Management - White Paper

PDFRev 0Mar 30, 20171.4 MBQORIQPMWPEnglish
^{White Paper}
QorIQ DPAA Primer for Software Architecture

PDFRev 0Jun 1, 20121.1 MBQORIQDPAAWPEnglish

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Design Resources

Software

Quick reference to our software types.

4 software files

^{BSPs and Device Drivers}
NetComm Software ResourcesFeatured

Download Options
^{Development IDEs and Build Tools}
CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVALFeatured

FLEXERARev 10.5.xNov 26, 2019 11:05:001 KBCWX-PA-PRO-EX

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^{Configuration Tools}
Processor Expert^® Software – Component Development Environment v1.0.4

Download Options
^{Development IDEs and Build Tools}
CodeWarrior^® Development Suites for Networked Applications

Download Options

Note: For better experience, software downloads are recommended on desktop.

Training

1 trainings

^On-Demand
Security 101: Introduction to Security Acceleration in QorIQ Processors

4 minEnglish
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QorIQ® P1023/17 Low-End Single- and Dual-Core Communications Processors with Data Path

Product Details

Block Diagram

Freescale QorIQ P1023/17 Communication Processor Block Diagram

Features

CORE COMPLEX

NETWORKING ELEMENTS

ACCELERATORS AND MEMORY CONTROL

BASIC PERIPHERALS AND INTERCONNECT

ADDITIONAL FEATURES

PACKAGE

Related products

Applications

Automotive

Communication Infrastructure

Buy/Parametrics

Documentation

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P1023 Fact SheetFeatured

Design Resources

Software

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NetComm Software ResourcesFeatured

CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVALFeatured

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QorIQ^® P1023/17 Low-End Single- and Dual-Core Communications Processors with Data Path