QorIQ® P3041 Quad-Core Communications Processors

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Product Details

Block Diagram


QorIQ P3041 Quad-Core Communications Processors


Core Complex

  • Four high-performance e500mc cores up to 1.5 GHz
  • Three level cache-hierarchy: 32 KB I/D L1, 128 KB private L2 per core, 1 MB shared CorNet platform cache

Networking Elements

  • One 10 Gbps Ethernet (XAUI) controllers
  • Five 1 Gbps Ethernet controllers available on SGMII, 2.5 Gbps SGMII, or RGMII

Accelerators and Memory Control

  • 64-bit (72-bit with ECC) DDR2/3 memory controller up to 1.3 GHz data rate
  • DPAA incorporating acceleration for the following functions:
    • Packet parsing, classification, and distribution
    • Queue management for scheduling, packet sequencing, and congestion management
    • Hardware buffer management for buffer allocation and de-allocation
    • Encryption (SEC 4.2)
    • RegEx Pattern Matching (PME 2.1)

Basic Peripherals and Interconnect

  • High-speed peripheral interfaces:
    • Four PCI Express® v2.0 controllers/ports running at up to 5 GHz
    • Two Serial RapidIO® 1.3/2.1 controllers/ports running at up to 5 GHz, with Type 9 and 11 messaging
    • Two SATA 2.0 interfaces
    • Two USB 2.0 controllers with integrated PHY, enhanced local bus controller (eLBC), SD/MMC, serial peripheral interface (SPI) controller, four I²C controllers, two dual

Additional Features

  • Hardware hypervisor for safe partitioning of operating systems between cores
  • Trusted boot capability to ensure only the correct code is booted and that code is not reverse-engineered
  • Pin-and software-compatible with P4040, P4080, P5010, and P5020

Part numbers include: P3041NSE1MMB, P3041NSE1NNB, P3041NSE1PNB, P3041NSE7MMC, P3041NSE7NNC, P3041NSE7PNC, P3041NSN1MMB, P3041NSN1NNB, P3041NSN1PNB, P3041NSN7MMC, P3041NSN7NNC, P3041NSN7PNC, P3041NXE1MMB, P3041NXE1NNB, P3041NXE1PNB, P3041NXE7MMC, P3041NXE7NNC, P3041NXE7PNC, P3041NXN1MMB, P3041NXN1NNB, P3041NXN1PNB, P3041NXN7MMC, P3041NXN7NNC, P3041NXN7PNC.

Comparison Table

P2040 P2041 P3041
Cores 4x e500mc 4x e500mc 4x e500mc
Core Frequency 667 - 1200 MHz 1200 - 1500 MHz 1200 - 1500 MHz
L2 Cache - 128KB/Core 128KB/Core
CoreNet Platform Cache 1MB Frontside 1MB Frontside 1MB Frontside
DDR 1x 64-bit DDR3/3L 1x 64-bit DDR3/3L 1x 64-bit DDR3/3L
GbE 5 x 1 GbE 5 x 1 GbE + 1 x 10 GbE 5 x 1 GbE + 1 x 10 GbE
PCIe Gen 2.0 3x Gen 2.0 controllers 5.0GHz 3x Gen 2.0 controllers 5.0GHz 4x Gen 2.0 controllers 5.0GHz
USB 2.0 2 2 2
sRIO 1.2 2 2 2
Other Interfaces 2 x SATA, 2 x  4-ch DMA engines, 4 x 2-pin UARTs or 2 x 4-pin UARTs 2 x SATA, 2 x  4-ch DMA engines, 4 x 2-pin UARTs or 2 x 4-pin UARTs 2 x SATA, 2 x  4-ch DMA engines, 4 x 2-pin UARTs or 2 x 4-pin UARTs
Accelerators SEC4.2, PME 2.0 SEC4.2, PME 2.0 SEC4.2, PME 2.0


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