Design Files
1 design file
-
Models
P2020 BSDL Model
QorIQ® P2020 and P2010 Dual- and Single-Core Communications Processors
P2020 Receive alerts
- Not Recommended for New Designs
- This page contains information on a product that is not recommended for new designs.
P2010 and P2020 devices are "Not recommended for new designs", please use the replacement families Power Architecture (T1013, T1023), Arm Architecture (LS1012A, LS1023A).
The QorIQ® P2020 and P2010 communications processors deliver high performance per watt for dual- and single-core applications. Using advanced 45nm process technology these CPUs reach frequencies up to 1.33GHz.
Pin-compatible with the QorIQ P1 family devices, the P2020 and P2010 devices offer four interchangeable cost-effective solutions, scaling from a single core at 533 MHz (P1011) to a dual core at 1.33 GHz (P2020) and delivering an impressive 4.5x aggregate frequency range within the same pinout.
Product Details
Block Diagram
Features
Core Complex
- Dual (P2020) or single (P2010) high-performance Power Architecture® e500 cores
- Up to 1.33 GHz
- 32 KB L1 and 512KB L2 caches
Networking Elements
- Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)
- Four SerDes up to 3.125 GHz multiplexed across controllers supporting:
- Two PCI Express® interfaces
- Two Serial RapidIO® interfaces
- Two SGMII interfaces
Accelerators and Memory Control
- Integrated security engine
- Protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi, XOR acceleration
Basic Peripherals and Interconnect
- Dual high-speed USB controllers (USB 2.0)
- eLBC, eSDHC, Dual I²C, DUART, PIC, DMA, GPIO
Additional Features
- Package: 689-pin temperature-enhanced plastic BGA (TEPBGA2)
- 0C to 125C Tj -40C to 125C Tj option
Comparison Table
| P2010 | P2020 | |
|---|---|---|
| Cores | 1 | 2 |
| Core Frequency | 800 - 1200 MHz | 800 - 1200 MHz |
| L2 Cache | 512KB | 512KB |
| DDR | 32/64-bit DDR2/DDR3 | 32/64-bit DDR2/DDR3 |
| GbE | 3 x 10/100/1000 | 3 x 10/100/1000 |
| PCIe Gen 1.0 | 3 controllers w/ 4 SERDES | 3 controllers w/ 4 SERDES |
| sRIO 1.2 | 2 x1 or 1 x4 | 2 x1 or 1 x4 |
| USB 2.0 | 1 | 1 |
| Memory Card | SD/MMC | SD/MMC |
| Other interfaces | SPI, 2xI2C, DUART | SPI, 2xI2C, DUART |
| Accelerators | SEC3.1 | SEC3.1 |
Documentation
Quick reference to our documentation types.
1-5 of 52 documents
-
Fact Sheet
Fact SheetFeatured
-
Reference Manual
P2020 QorIQ Integrated Processor Reference ManualFeatured
Design Resources
Hardware
4 hardware offerings
-
Evaluation and Development BoardsP2020 Reference Design BoardFeatured
-
Evaluation and Development BoardsP2020 Development System Featured
-
Emulators, Probes, and ProgrammersPower Architecture® processor ( COP ) Probe Tips for CodeWarrior® TAP
-
Emulators, Probes, and ProgrammersCodeWarrior® TAP
Software
3 software files
-
IDE and Build Tools
CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVALFeatured
-
IDE and Build Tools
CodeWarrior® Development Suites for Networked Applications
-
Components and Modules
Processor Expert® Software – Component Development Environment v1.0.4
Note: For better experience, software downloads are recommended on desktop.
Training
1 trainings