Arm Cortex-M4|Kinetis K51 100 MHz 32-bit MCUs

Features

Ultra-Low-Power

10 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents down to 2 µA, and run currents of <350 µA/MHz, with 4 µs wake-up from stop mode
Full memory and analog operation down to 1.71 volts for extended battery life
Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
Low-power timer for continual system operation in reduced power state

Flash, SRAM and FlexMemory

256 KB - 512 KB flash. Fast access, high reliability with four-level security protection
64 KB - 128 KB of SRAM
FlexMemory: 32 bytes - 4 KB of user segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10 M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup
Up to two programmable gain amplifiers with x64 gain for small amplitude signal conversion

Mixed-Signal Capability

Two operational amplifiers allow signal filtering and amplification
Two transimpedance amplifiers optimized for converting current inputs into voltages that can be read by the ADC
Two high-speed 16-bit ADCs with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering
Two 12-bit DACs for analog waveform generation for audio applications
Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state
Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost

Performance

Cortex-M4 core with DSP, 100 MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions
16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth
•Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines

Timing and Control

Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control
Carrier modulator timer for infrared waveform generation in remote control applications
Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block

Human-Machine Interface

Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick
Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and allows LCD configuration changes via firmware with no hardware re-work. Supports multiple 3 V and 5 V LCD panel sizes with fewer segments (pins) than competitive controllers and no external components. Unused LCD pins can be configured as other GPIO functions

Connectivity and Communications

USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 V to power external components from 5 V input
Up to five UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protocols
Inter-IC Sound (I²S) serial interface for audio system interfacing
Up to three DSPI and two I²C

Reliability, Safety and Security

Hardware Encryption coprocessor for secure data transfer and storage. Faster than software implementations and with minimal CPU loading. Supports a wide variety of algorithms - DES, 3DES, AES, MD5, SHA-1, SHA-256
Memory protection unit provides memory protection for all masters on the cross bar switch, increasing software reliability
Cyclic redundancy check engine validates memory contents and communication data, increasing system reliability
Independent-clocked COP guards against clock skew or code runaway for fail-safe applications such as the IEC 60730 safety standard for household appliances
External watchdog monitor drives output pin to safe state external components if watchdog event occurs
This product is included in NXP^®.s product longevity program, with assured supply for a minimum of 15 years after launch

External Peripheral Support

FlexBus external bus interface provides interface options to memories and peripherals such as graphics displays. Supports up to 6 chip selects and 2GB addressable space
Secure digital host controller supports SD, SDIO, MMC or CE-ATA cards for in-application software upgrades, media files or adding Wi-Fi support

Features

Ultra-Low-Power

10 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents down to 2 µA, and run currents of <350 µA/MHz, with 4 µs wake-up from stop mode
Full memory and analog operation down to 1.71 volts for extended battery life
Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
Low-power timer for continual system operation in reduced power state

Flash, SRAM and FlexMemory

256 KB - 512 KB flash. Fast access, high reliability with four-level security protection
64 KB - 128 KB of SRAM
FlexMemory: 32 bytes - 4 KB of user segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10 M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, upto 256 KB can be used for extra program code, data or EEPROM backup
Up to two programmable gain amplifiers with x64 gain for small amplitude signal conversion

Mixed-Signal Capability

Two operational amplifiers allow signal filtering and amplification
Two transimpedance amplifiers optimized for converting current inputs into voltages that can be read by the ADC
Two high-speed 16-bit ADCs with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering
Two 12-bit DACs for analog waveform generation for audio applications
Three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state
Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost

Performance

Cortex-M4 core with DSP, 100 MHz clock, single cycle MAC, and single instruction multiple data (SIMD) extensions
16-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth
•Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines

Timing and Control

Up to three FlexTimers with a total of 12 channels. Hardware dead-time insertion and quadrature decoding for motor control
Carrier modulator timer for infrared waveform generation in remote control applications
Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block

Human-Machine Interface

Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick
Flexible, low-power LCD controller with up to 320 segments (40x8 or 44x4). LCD blink mode enables low average power while remaining in low-power mode. Segment fail detect guards against erroneous readouts and reduces LCD test costs. Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and allows LCD configuration changes via firmware with no hardware re-work. Supports multiple 3 V and 5 V LCD panel sizes with fewer segments (pins) than competitive controllers and no external components. Unused LCD pins can be configured as other GPIO functions

Connectivity and Communications

USB 2.0 On-The-Go (full speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 V to power external components from 5 V input
Up to five UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protocols
Inter-IC Sound (I²S) serial interface for audio system interfacing
Up to three DSPI and two I²C

Reliability, Safety and Security

Hardware Encryption coprocessor for secure data transfer and storage. Faster than software implementations and with minimal CPU loading. Supports a wide variety of algorithms - DES, 3DES, AES, MD5, SHA-1, SHA-256
Memory protection unit provides memory protection for all masters on the cross bar switch, increasing software reliability
Cyclic redundancy check engine validates memory contents and communication data, increasing system reliability
Independent-clocked COP guards against clock skew or code runaway for fail-safe applications such as the IEC 60730 safety standard for household appliances
External watchdog monitor drives output pin to safe state external components if watchdog event occurs
This product is included in NXP^®.s product longevity program, with assured supply for a minimum of 15 years after launch

External Peripheral Support

FlexBus external bus interface provides interface options to memories and peripherals such as graphics displays. Supports up to 6 chip selects and 2GB addressable space
Secure digital host controller supports SD, SDIO, MMC or CE-ATA cards for in-application software upgrades, media files or adding Wi-Fi support

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